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Espressif Systems /ESP32-S2 /UHCI0 /HUNG_CONF

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Interpret as HUNG_CONF

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0TXFIFO_TIMEOUT0TXFIFO_TIMEOUT_SHIFT 0 (TXFIFO_TIMEOUT_ENA)TXFIFO_TIMEOUT_ENA 0RXFIFO_TIMEOUT0RXFIFO_TIMEOUT_SHIFT 0 (RXFIFO_TIMEOUT_ENA)RXFIFO_TIMEOUT_ENA

Description

Timeout configuration

Fields

TXFIFO_TIMEOUT

This register stores the timeout value. UHCI produce the UHCI_TX_HUNG_INT interrupt when DMA takes more time to receive data.
TXFIFO_TIMEOUT_SHIFT

This register is used to configure the maximum tick count.
TXFIFO_TIMEOUT_ENA

This is the enable bit for TX FIFO receive timeout.
RXFIFO_TIMEOUT

This register stores the timeout value. UHCI produce the UHCI_RX_HUNG_INT interrupt when DMA takes more time to read data from RAM.
RXFIFO_TIMEOUT_SHIFT

This register is used to configure the maximum tick count.
RXFIFO_TIMEOUT_ENA

This is the enable bit for DMA send timeout.

Links

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Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/espressif/svd